adms

Automatic device model synthesizer for Verilog-AMS

Description

ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators. Based on transformations specified in xml language adms transforms Verilog-AMS code into other target languages.

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Homepage

https://github.com/Qucs/ADMS


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