arachne-pnr-chipdb
Chip db files for arachne-pnr
Description
Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device. This package contains the binary versions of the chipdb files needed by arachne-pnrUpload more screenshots
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Homepage
https://github.com/YosysHQ/arachne-pnr
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